The breakdown voltage of high voltage discrete devices and integrated circuits can be decreased by the presence of charge (usually ionic) on top surface insulator layers or within the insulating layers. Cracks or pinholes in an insulating layer can allow charge to leak up into or on top of the insulating layers and to spread out from the point of origination. If the potential generated by this leakage charge is different from that of the silicon below it, then field crowding results and breakdown voltages can be reduced. A technique for limiting this effect is to shield the silicon surface of the device from the effects of the charge on the insulator layer(s) by using a resistive field shield which contacts the surface of the device or is at some distance above the surface and makes electrical contact to conductors on the surface. A semi-insulating polysilicon (SIPOS) layer may be used as such a shield. One problem created by the use of a SIPOS shield layer is that it introduces leakage which may be greater than is acceptable in some applications.
It is desirable to maintain breakdown voltages of high voltage devices while maintaining any extra generated leakage at a relatively low level.